Semiconductor devices are commonly found in modern electronic products. Semiconductor devices vary in the number and density of electrical components. Discrete semiconductor devices generally contain one type of electrical component, e.g., light emitting diode (LED), small signal transistor, resistor, capacitor, inductor, and power metal oxide semiconductor field effect transistor (MOSFET). Integrated semiconductor devices typically contain hundreds to millions of electrical components. Examples of integrated semiconductor devices include microcontrollers, microprocessors, charged-coupled devices (CCDs), solar cells, and digital micro-mirror devices (DMDs).
Semiconductor devices perform a wide range of functions such as signal processing, high-speed calculations, transmitting and receiving electromagnetic signals, controlling electronic devices, transforming sunlight to electricity, and creating visual projections for television displays. Semiconductor devices are found in the fields of entertainment, communications, power conversion, networks, computers, and consumer products. Semiconductor devices are also found in military applications, aviation, automotive, industrial controllers, and office equipment.
Semiconductor devices exploit the electrical properties of semiconductor materials. The atomic structure of semiconductor material allows its electrical conductivity to be manipulated by the application of an electric field or base current or through the process of doping. Doping introduces impurities into the semiconductor material to manipulate and control the conductivity of the semiconductor device.
A semiconductor device contains active and passive electrical structures. Active structures, including bipolar and field effect transistors, control the flow of electrical current. By varying levels of doping and application of an electric field or base current, the transistor either promotes or restricts the flow of electrical current. Passive structures, including resistors, capacitors, and inductors, create a relationship between voltage and current necessary to perform a variety of electrical functions. The passive and active structures are electrically connected to form circuits, which enable the semiconductor device to perform high-speed calculations and other useful functions.
Semiconductor devices are generally manufactured using two complex manufacturing processes, i.e., front-end manufacturing, and back-end manufacturing, each involving potentially hundreds of steps. Front-end manufacturing involves the formation of a plurality of die on the surface of a semiconductor wafer. Each die is typically identical and contains circuits formed by electrically connecting active and passive components. Back-end manufacturing involves singulating individual die from the finished wafer and packaging the die to provide structural support and environmental isolation.
One goal of semiconductor manufacturing is to produce smaller semiconductor devices. Smaller devices typically consume less power, have higher performance, and can be produced more efficiently. In addition, smaller semiconductor devices have a smaller footprint, which is desirable for smaller end products. A smaller die size can be achieved by improvements in the front-end process resulting in die with smaller, higher density active and passive components. Back-end processes may result in semiconductor device packages with a smaller footprint by improvements in electrical interconnection and packaging materials
Another goal of semiconductor manufacturing is to produce a package suitable for faster, reliable, smaller, and higher-density integrated circuits (IC) at lower cost. Flipchip packages or wafer level packages (WLP) are ideally suited for ICs demanding high speed, high density, and greater pin count. Flipchip style packaging involves mounting the active side of the die facedown toward a chip carrier substrate or printed circuit board (PCB). The electrical and mechanical interconnect between the active devices on the die and conduction tracks on the carrier substrate is achieved through a bump structure comprising a large number of conductive bumps or balls. The bumps are formed by a reflow process applied to solder material deposited on contact pads which are disposed on the semiconductor substrate. The bumps are then bonded to the carrier substrate. The flipchip semiconductor package provides a short electrical conduction path from the active devices on the die to the carrier substrate in order to reduce signal propagation, lower capacitance, and achieve overall better circuit performance.
FIGS. 1a-1b show a conventional flipchip configuration with a solder mask dam disposed between the bond pads. In FIG. 1a, a semiconductor die or flipchip 10 is shown for mounting to chip carrier substrate or printed circuit board (PCB) 14. The PCB contains a plurality of bonding pads 18. Flipchip 10 includes a plurality of bumps 12 disposed on an active surface of the die for interconnect to external devices. Flipchip 10 is mounted to PCB 14 in FIG. 1b. Bumps 12 are formed on bonding pads or under bump metallization layer (UBM) 15. An insulating layer 16 is formed on the active surface of flipchip 10 over UBM 15. A portion of insulating layer 16 is removed to attach bumps 12 to UBM 15. A solder mask dam 20 is formed on substrate 14. Bumps 12 are then metallurgically and electrically connected to bond pads 18 on substrate 14. The solder mask dam contains the solder reflow over the bond pads.
Many flipchip designs call for a fine pitch, e.g., less than 150 micrometers (μm), between the interconnect structures, such as the bump pads and signal traces on the PCB, for a higher interconnect density and input/output (I/O) terminal count. The solder mask dam requires more lateral space and therefore limits the bump and signal trace pitch. Without a solder mask dam, the solder could bridge or short to adjacent signal traces during the solder reflow process to join the flipchip to the PCB. For example, bumps 12 are shown in FIG. 2 as being metallurgically and electrically connected to the intended bond pads 18 using a solder reflow process. During solder reflow in a fine pitch design, the solder material may extend over the adjacent signal traces 22 due to misalignment or irregular bump diameter. In this case, bumps 18 would electrically bridge or short to signal traces 22 causing a defect.
While most flipchip PCBs are fabricated with solder on pad (SOP) printing to make robust solder joints on the bond pad, in case of fine pitch bonding, the SOP treatment of controlled collapsible chip connection (C4) is limited due to potential bridges between adjacent interconnect structures.